![]() When it is set high however, the computer enters fast execution on the rising edge, where it executes multiple instructions per clock pulse. When the two least significant bits of the mode register are low, the computer runs normally, executing 1 instruction per clock pulse. There are two registers involved in this, address 00ca, the mode register, and address 00cb, the protection register. Due to this, the Femto-4 includes several execution modes that allow the computer to run much faster. The initial 16kx16b are therefore mapped to everything else, including a fixed "work" RAM chip that cannot be switched out, the bootloader, the PPU data, general use registers, the, stack, inputs, outputs, and special use registers.Įxecution at the fastest clock speed (one pulse every 100ms, or 10Hz, which is defined as the clock changing state every 50ms, or at a rate of 20Hz) is terribly slow, and would make reasonable graphics effectively impossible. In theory, additional memory can be added in a cart by creating a similar system on the inside of the cart, which would allow it to swap between even more EEPROM/RAM chips. This gives each cart 512kx16b of memory to play with. The carts have 32 16kx16b EEPROM/RAM chips, which can be switched between during execution by writing to address 00cc. This is where the interchangeable program would be stored, allowing programs to be easily changed by changing carts. The last 48kx16b of memory (all addresses starting with 01, 10, or 11) are dedicated to the cart memory. The 16-bit address space of the Femto-4 is memory mapped, with all data being stored somewhere in the address space. OP Codes and operands are all 16-bits, which is a bit wasteful in terms of OP Code usage, however it was easier to implement this way, and so that is what I went with (and there are a lot of ALU processes). Data from the data out bus can be written to any special register during the instruction. The MAR always specifies the address being read to or written from, whilst the MDR always holds the data being written. Data is read through the standard data retrieval system (which is handy since its design is so universal and easy to add to) making this architecture a Von Neumann architecture as opposed to a Harvard architecture, like my previous, worse, computer. This is usually fine, since the OP Code space is so empty that the data will likely be passed one at a time until the next valid instruction. This allows execution to become incorrectly offset, which can lead to the execution of garbage if the PC is jumped to an incorrect address. First the OP Code of the instruction is read, and then depending on the OP Code, additional pieces of data may be read for the operands. The Femto-4 is a 16-bit computer with variable length instructions that are comprised of multiple 16-bit words. If you want to save your own scores permanently you will have to fork the project. The Flappy Bird high score and the Snake high score are mine. Made Reset clear WRAM and the General RegistersĪdded a Bundle Cart that allows you to view all the carts I have made without changing carts (you must reset the console to view another cart)įixed bug in standard bank design which wrote data to incorrect addressesĪdded Reset and Power Labels to the relevant buttonsĭo fork the project and write your own code for it! If you want more information on how to do so read the Developer Guide in the assembler. Removed unnecessary write lines leading to EEPROMs in carts, preventing code from being overwritten during execution Removed unnecessary EEPROM banks from all carts Moved to new project to fix issues around searching for projects branched from private projects Updated the Cart B to respond to the start button on both controllers Updated Cart A and Cart B to make use of the Register ALU instructions Made Bootloader clear TTY, Keyboard, and Controller Pushed "Faster Execution" - Runs instructions on both edges of the clock pulseġ6x16 pixel display with 32 "Sprites" and 15-bit direct colourĪssembler (written in an external program) "Fast Execution" - Can run more than one instruction per clock cycle Switchable Memory Banks, allowing for a standard cart to hold up to 512kx16b of dataĪn ALU capable of logical operators, addition, subtraction, shift left, shift right, multiplying, dividing, and other specialised functions This project was started around November 2020.īundle Cart: All carts in direct and indirect memory access This is a branch to keep a functional version around. Latest versions of the 256-Series, including the Femto-4:Ī 16-bit computer/maybe console inspired thing, the Femto-4.
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